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Checking for Differential Impedance

One of the basic concepts of signal integrity is maintaining impedance. Whether a design will…

SerDes Design Part 6: JCOM, the Compliance Method for JESD204C Specification

Continuing my blog series on SerDes design, today we’ll talk about JESD COM (JCOM), a…

SerDes Design Part 5: Channel Operating Margin, a Powerful Compliance Tool

In part five of this series about SerDes design, I focus on the adoption and…

SerDes Design Part 4: Frequency Domain Analysis for High Data Rate SerDes Links

Despite the fact that eye diagrams were a very popular compliance method for serial links,…

What’s New in HyperLynx VX.2.3?

I’m glad you asked! HyperLynx® VX.2.3 contains a large number of signal- and power-integrity analysis…

Why Do We Keep Doing Things the Old Way? A Story of Nets Crossing Gaps.

Remember the old times when we used to have a dedicated person type up all…

SerDes Design Part 3: Compliance Measurements Using Eye Diagrams

In my continuing series about SerDes design, I’ve discussed the first steps you need to…

SerDes Design Part 2: Serial Protocols and SI Methods Trends

In part two of my blog series about SerDes design, I talk about the evolution…

IC Speeds vs. Power Supplies

In most modern designs, you have to work with ICs that are running at very…