{"id":259,"date":"2019-03-02T13:43:00","date_gmt":"2019-03-02T18:43:00","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/?p=259"},"modified":"2026-03-26T16:00:10","modified_gmt":"2026-03-26T20:00:10","slug":"tech-design-forum-catapult-hls-integrates-efpga-ip-for-faster-development","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/2019\/03\/02\/tech-design-forum-catapult-hls-integrates-efpga-ip-for-faster-development\/","title":{"rendered":"Tech Design Forum: Catapult HLS Integrates eFPGA IP for Faster Development"},"content":{"rendered":"\n<p>Excerpt from article: \u201c<a href=\"https:\/\/www.techdesignforums.com\/blog\/2019\/04\/02\/catapult-hls-integrates-efpga-ip-for-faster-development\/\" target=\"_blank\" rel=\"noreferrer noopener\">Catapult HLS Integrates eFPGA IP for Faster Development<\/a>&#8220;<\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\"><p><a href=\"https:\/\/semiengineering.com\/entities\/mentor-a-siemens-business\/\" target=\"_blank\" rel=\"noreferrer noopener\">Siemens EDA<\/a> is looking to extend the configurability options available from high-level synthesis (HLS) through a collaboration with Menta SAS, a provider of customizable embedded FPGA (eFPGA) IP.<\/p><p>The integration between Siemens EDA&#8217;s Catapult HLS tool family and Menta\u2019s IP and accompanying Origami programmer will, the companies say, allow design teams to change eFPGA configurations at any stage of development.<\/p><p>Menta\u2019s IP allows engineers to specify the size and number of embedded logic blocks (eLBs), global clocks, memory, ALUs, and interfaces as required for any application at any process node. Menta\u2019s eFPGA fabric also supports third party IP and memory blocks.<\/p><\/blockquote>\n\n\n\n<p>Read the entire article on <a href=\"https:\/\/www.techdesignforums.com\/blog\/2019\/04\/02\/catapult-hls-integrates-efpga-ip-for-faster-development\/\" target=\"_blank\" rel=\"noreferrer noopener\">TechDesignForum<\/a> originally published on March 2nd, 2019.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Excerpt from article: \u201cCatapult HLS Integrates eFPGA IP for Faster Development&#8220; Siemens EDA is looking to extend the configurability options&#8230;<\/p>\n","protected":false},"author":77876,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[421,422,423],"industry":[],"product":[84],"coauthors":[349],"class_list":["post-259","post","type-post","status-publish","format-standard","hentry","category-news","tag-efpga","tag-efpga-ip","tag-faster-development","product-catapult"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts\/259","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/users\/77876"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/comments?post=259"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts\/259\/revisions"}],"predecessor-version":[{"id":262,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts\/259\/revisions\/262"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/media?parent=259"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/categories?post=259"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/tags?post=259"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/industry?post=259"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/product?post=259"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/coauthors?post=259"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}