{"id":146,"date":"2020-02-13T15:52:00","date_gmt":"2020-02-13T20:52:00","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/?p=146"},"modified":"2026-03-26T15:59:13","modified_gmt":"2026-03-26T19:59:13","slug":"semiengineering-reducing-power-at-rtl","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/2020\/02\/13\/semiengineering-reducing-power-at-rtl\/","title":{"rendered":"SemiEngineering: Reducing Power At RTL"},"content":{"rendered":"\n

Excerpt from article: \u201cReducing Power At RTL<\/a>\u201d<\/p>\n\n\n\n

Other issues<\/strong><\/p>

Integration is also a consideration. \u201cAccuracy of the power efficiency analysis is critical to both techniques,\u201d said Knoth. \u201cYou cannot afford miscorrelation between what the RTL power estimation tool believes the synthesis tool will do, what the place-and-route tool will build for a clock tree, or what the signoff power tool will calculate. If you have four different tools from four different EDA vendors, when the tools don\u2019t correlate, who\u2019s responsible? For guided RTL reduction, miscorrelation will cause critical path slips. You\u2019re wasting time from the most schedule-critical resources to chase phantoms. For automatic reductions, you need to have the power efficiency analysis and optimization engine embedded inside of the synthesis and implementation flow. It\u2019s important to consider not just the power reduction, but also the timing\/area\/congestion impact of the changes. An example is combinatorial clock gating with XOR gates. It is relatively easy to show how it could reduce clock power. It is much harder to make sure it doesn\u2019t introduce new implementation issues with area\/congestion\/timing. Only a tightly integrated solution will be safe when considering these tradeoffs.\u201d<\/p>

Practically, many times the choice comes down to the time available, observed Mohammed Fahad, product engineer at Siemens EDA<\/a>. \u201cGiven you have enough time to closely look at all the suggestions, and very meticulously implement the changes suggested by the tool, you would go with the guided approach. But if you don\u2019t have enough time at hand, and the time-to-market window is closing soon, then you would go with the automatic reduction. There are definitely many pros and cons of both. For example, in the manual flow, if you would like to retain the control of your RTL, but there is overhead for the designer doing extra change in the RTL \u2014 which wasn\u2019t a part of their mandate, but the tool is suggesting something \u2014 then they will have to do it. The rest of the downstream flow of verification is additional. In the case of automatic optimization, if it gives a quick reduction of power at the same time, as in, \u2018It\u2019s a tool-generated RTL, you have concern of controllability of the RTL, credibility of the RTL and then the verification.\u2019\u201d<\/p><\/blockquote>\n\n\n\n

Read the entire article on SemiEngineering <\/a>originally published on February 13th, 2020.<\/p>\n","protected":false},"excerpt":{"rendered":"

Excerpt from article: \u201cReducing Power At RTL\u201d Other issues Integration is also a consideration. \u201cAccuracy of the power efficiency analysis…<\/p>\n","protected":false},"author":77876,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[377,376],"industry":[],"product":[176],"coauthors":[349],"class_list":["post-146","post","type-post","status-publish","format-standard","hentry","category-news","tag-reducing-power","tag-rtl","product-powerpro"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts\/146","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/users\/77876"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/comments?post=146"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts\/146\/revisions"}],"predecessor-version":[{"id":147,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/posts\/146\/revisions\/147"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/media?parent=146"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/categories?post=146"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/tags?post=146"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/industry?post=146"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/product?post=146"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/hlsdesign-verification\/wp-json\/wp\/v2\/coauthors?post=146"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}