{"id":71,"date":"2016-12-05T16:01:37","date_gmt":"2016-12-05T23:01:37","guid":{"rendered":"https:\/\/blogs.mentor.com\/expertinsights\/?p=71"},"modified":"2026-03-26T16:10:21","modified_gmt":"2026-03-26T20:10:21","slug":"top-5-articles-of-the-week-3","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/expertinsights\/2016\/12\/05\/top-5-articles-of-the-week-3\/","title":{"rendered":"Top 5 Articles of the Week"},"content":{"rendered":"<ol>\n<li><strong><a href=\"http:\/\/www.eetimes.com\/author.asp?section_id=36&amp;doc_id=1330675\" target=\"_blank\" rel=\"noopener\">Verification Flow: Panel Gauges Future Flows<\/a><\/strong><\/li>\n<li><a href=\"http:\/\/semiengineering.com\/auto-security-and-technology-questions-persist\/\" target=\"_blank\" rel=\"noopener\"><strong>Auto Security and Technology Questions Persist<\/strong><\/a><\/li>\n<li><a href=\"http:\/\/www.edn.com\/electronics-blogs\/absolute-eda\/4442629\/Back-annotating-DFM-enhancements-to-place---route-tools\" target=\"_blank\" rel=\"noopener\"><strong>Back-annotating DFM Enhancements to Place &amp; Route Tools<\/strong><\/a><\/li>\n<li><strong><a href=\"http:\/\/www.electronicspecifier.com\/design-automation\/how-do-you-solve-a-problem-like-systems\" target=\"_blank\" rel=\"noopener\">How Do You Solve a Problem Like Systems?<\/a><\/strong><\/li>\n<li><strong><a href=\"http:\/\/semiengineering.com\/joint-rd-has-its-ups-and-downs\/\" target=\"_blank\" rel=\"noopener\">Joint R&amp;D Has Its Ups And Downs<\/a><\/strong><\/li>\n<\/ol>\n<p>&nbsp;<\/p>\n<p><strong>\u00a0<\/strong><\/p>\n<p><strong><a href=\"http:\/\/www.eetimes.com\/author.asp?section_id=36&amp;doc_id=1330675\" target=\"_blank\" rel=\"noopener\">Verification Flow: Panel Gauges Future Flows<\/a><\/strong><br \/>\n<em>EE Times<\/em><br \/>\nThe DVCon India panel discussion \u201cThe Future Verification Flow\u201d featured experts from Broadcom and Qualcomm and covered simulation, formal verification, emulation, and everything in-between.<\/p>\n<p>&nbsp;<br \/>&nbsp;<\/p>\n<p><a href=\"http:\/\/semiengineering.com\/auto-security-and-technology-questions-persist\/\" target=\"_blank\" rel=\"noopener\"><strong>Auto Security and Technology Questions Persist<\/strong><\/a><br \/>\n<em>Semiconductor Engineering\u00a0<img loading=\"lazy\" decoding=\"async\" class=\" wp-image-83 alignright\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/49\/2016\/12\/purple-car-300x251-1.jpg\" alt=\"purple-car-300x251\" width=\"241\" height=\"157\" \/><br \/>\n<\/em>Semiconductor automotive suppliers are taking more responsibility for ensuring safety and security of their ICs. Robert Bates, chief safety officer at Mentor Graphics, is featured in this expert roundtable.<\/p>\n<p>&nbsp;<br \/>&nbsp;<\/p>\n<p><a href=\"http:\/\/www.edn.com\/electronics-blogs\/absolute-eda\/4442629\/Back-annotating-DFM-enhancements-to-place---route-tools\" target=\"_blank\" rel=\"noopener\"><strong>Back-annotating DFM Enhancements to Place &amp; Route Tools<\/strong><\/a><br \/>\n<em>EDN<img loading=\"lazy\" decoding=\"async\" class=\"wp-image-75 alignright\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/49\/2016\/12\/absedabackannof4-1-520x354.png\" alt=\"absedabackannof4 (1)\" width=\"236\" height=\"161\" \/>\u00a0<\/em><br \/>\nBack-annotated DFM enhancements in place and route layout is critical for reducing manufacturing failures and improving yield. Mentor has developed utilities that make the back-annotation process simpler and faster. This article walks you through a demonstration of how the general process works.<\/p>\n<p>&nbsp;<br \/>&nbsp;<\/p>\n<p><strong><a href=\"http:\/\/www.electronicspecifier.com\/design-automation\/how-do-you-solve-a-problem-like-systems\" target=\"_blank\" rel=\"noopener\">How Do You Solve a Problem Like Systems?<\/a><\/strong><br \/>\n<em>Electronic Specifier<img loading=\"lazy\" decoding=\"async\" class=\" wp-image-77 alignright\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/49\/2016\/12\/whatisasystem-mentor-graphics-xpedition-520x185.jpg\" alt=\"whatisasystem mentor graphics xpedition\" width=\"300\" height=\"107\" \/>\u00a0<\/em><br \/>\nThis article introduces a multi-board systems design solution for seamless multi-discipline collaboration.<\/p>\n<p>&nbsp;<br \/>&nbsp;<\/p>\n<p><strong><a href=\"http:\/\/semiengineering.com\/joint-rd-has-its-ups-and-downs\/\" target=\"_blank\" rel=\"noopener\">Joint R&amp;D Has Its Ups And Downs<\/a><\/strong><br \/>\n<em>Semiconductor Engineering<\/em><br \/>\nJoint R&amp;D between academia and industry benefits both parties, but there are also drawbacks. Industry experts, including Greg Hinckley, offer their insights.<\/p>\n<p>&nbsp;<br \/>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Verification Flow: Panel Gauges Future Flows Auto Security and Technology Questions Persist Back-annotating DFM Enhancements to Place &amp; Route Tools&#8230;<\/p>\n","protected":false},"author":71674,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[317,358,362,397,418],"industry":[],"product":[],"coauthors":[],"class_list":["post-71","post","type-post","status-publish","format-standard","hentry","category-news","tag-automotive","tag-functional-verification","tag-ic-design","tag-pcb-design","tag-silicon-test-and-yield"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts\/71","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/users\/71674"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/comments?post=71"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts\/71\/revisions"}],"predecessor-version":[{"id":1989,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts\/71\/revisions\/1989"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/media?parent=71"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/categories?post=71"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/tags?post=71"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/industry?post=71"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/product?post=71"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/coauthors?post=71"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}