{"id":101,"date":"2016-12-19T09:03:16","date_gmt":"2016-12-19T16:03:16","guid":{"rendered":"https:\/\/blogs.mentor.com\/expertinsights\/?p=101"},"modified":"2026-03-26T16:10:25","modified_gmt":"2026-03-26T20:10:25","slug":"top-5-articles-on-multi-pcb-rtos-emulation-cmp-more","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/expertinsights\/2016\/12\/19\/top-5-articles-on-multi-pcb-rtos-emulation-cmp-more\/","title":{"rendered":"Top 5 Articles on Multi-PCB, RTOS, Emulation, CMP & More"},"content":{"rendered":"
    \n
  1. Keeping It Fresh with the Veloce Deterministic ICE App<\/a><\/strong><\/li>\n
  2. Avoiding the Barriers For Multi-Board Systems Design Development<\/a><\/strong><\/li>\n
  3. Program Structure and Real Time<\/a><\/strong><\/li>\n
  4. Creating an Accurate FEOL CMP Model<\/a><\/strong><\/li>\n
  5. European User Group Offers Memorable Keynotes, Practical Technical Sessions<\/a><\/strong><\/li>\n<\/ol>\n

    \u00a0<\/strong><\/p>\n

    Keeping It Fresh with the Veloce Deterministic ICE App<\/a><\/strong>
    \nSemiWiki\"fig<\/em>
    \nNew emulation tools allow verification engineers to overcome ICE-based flow debug challenges and keep ICE current with modern design and verification trends. Get an introduction to the Veloce Deterministic ICE App use model.<\/p>\n

     
     <\/p>\n


    \nAvoiding the Barriers For Multi-Board Systems Design Development<\/a><\/strong>
    \nSemiconductor Engineering\"Xpedition-MBSD-visual+url-Final<\/em>
    \nAs systems designs get more complex, design teams need an environment that supports collaboration. The new Xpedition multi-board systems design flow allows hardware design, from multi-board system specification to completed PCBs and cables, to be handled with one integrated flow.<\/p>\n

     
     <\/p>\n

    Program Structure and Real Time<\/a><\/strong>
    \nEmbedded.com\"RTOSRevealed290\"<\/em>
    \nWhat is an operating system and why should you use one? Colin Walls answers this and more as he explains program structure and real time operating systems (RTOS).<\/p>\n

     
     <\/p>\n

    Creating an Accurate FEOL CMP Model<\/a><\/strong>
    \nSemiconductor Engineering\u00a0\"Fig1_CMP-modeling\"<\/em>
    \nAt 20nm and below, FEOL CMP modeling helps both designers and process engineers predict and eliminate hotspots in production designs. Learn more about this powerful methodology.<\/p>\n

     
     <\/p>\n

    European User Group Offers Memorable Keynotes, Practical Technical Sessions<\/a><\/strong>
    \nEDACafe\"u2u\"<\/em>
    \nMentor\u2019s European user conference, User2User, hit record attendance this year. Lauro Rizzatti recaps the \u201cexceptional event\u201d from the keynotes by Wally Rhines and Dr. Carol Marsh, to the technical presentations.
    \n
     
     <\/p>\n","protected":false},"excerpt":{"rendered":"

    Keeping It Fresh with the Veloce Deterministic ICE App Avoiding the Barriers For Multi-Board Systems Design Development Program Structure and…<\/p>\n","protected":false},"author":71674,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[349,350,358,362,397],"industry":[],"product":[],"coauthors":[],"class_list":["post-101","post","type-post","status-publish","format-standard","hentry","category-news","tag-embedded","tag-emulation","tag-functional-verification","tag-ic-design","tag-pcb-design"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts\/101","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/users\/71674"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/comments?post=101"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts\/101\/revisions"}],"predecessor-version":[{"id":1991,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/posts\/101\/revisions\/1991"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/media?parent=101"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/categories?post=101"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/tags?post=101"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/industry?post=101"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/product?post=101"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/expertinsights\/wp-json\/wp\/v2\/coauthors?post=101"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}