Article Roundup: In-Vehicle Infotainment, Power-Aware Verification, Smart Factories, 10nm, and Mentor at DAC

  1. Creating Embedded Platforms for Integrated Infotainment
  2. Working With Custom Checkers in Dynamic Simulation of Low Power Designs
  3. PCB Designers Hold Smart Factories Ransom
  4. 2017 Will Be B-I-G
  5. DAC 2017 Preview: Mentor


Creating Embedded Platforms for Integrated Infotainment
EE Catalog

In-vehicle infotainment systems are becoming a differentiating selling point for manufacturers. But new techniques are needed to combine 2D/3D graphics with safety-critical information. Applying new thinking to embedded software frameworks allows safety critical and “normal world” applications to co-exist, meeting the needs of both suppliers and vehicle buyers.


Working With Custom Checkers in Dynamic Simulation of Low Power Designs
Semiconductor Engineering

Although power-aware (PA) simulators can provide a wide range of automated assertions in the form of dynamic sequence checkers that cover every possible PA dynamic verification scenario, design-specific verification complexities may arise. This article explains how to handle design-specific power-aware verification complexities with SystemVerilog and UPF.


PCB Designers Hold Smart Factories Ransom
Circuits Assembly

The success of smart factory innovation is highly dependent on PCB layout design. Issues related to PCB layout have always been the source of unexpected costs and delays throughout the entire product market lifecycle. Many companies have ended up accepting multiple, repeated PCB fabrication and assembly issues for years. If smart factories are to work, however, this attitude has to change. The author explores the many challenges of creating a PCB design that optimizes smart factory capability.


2017 Will Be B-I-G
Electronic Design

2017 is the year of volume manufacturing for 10nm – Samsung introduced the first mass-produced SoC using 10nm, Samsung and Qualcomm used 10nm for the Snapdragon 835 mobile processor, and more. Staying aligned and in synch with your foundry has never been more critical to ensure smooth design tapeouts. Michael White reviews trends and plans for volume production for 10nm and growing 7nm starts.


DAC 2017 Preview: Mentor
Tech Design Forum

The 54th Design Automation Conference is coming to Austin, Texas June 18-22. Each day is full of exciting activities featuring Mentor technical experts on the latest in cutting-edge design in the conference program and on the exhibit floor. This article outlines some of Mentor’s agenda highlights including a one-on-one interview with Wally Rhines, Chairman and CEO, along with a keynote from Chuck Grindstaff, Executive Chairman of Siemens PLM Software.


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