{"id":86,"date":"2023-03-07T17:41:49","date_gmt":"2023-03-07T22:41:49","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/employee-spotlight\/?p=86"},"modified":"2026-03-27T09:52:56","modified_gmt":"2026-03-27T13:52:56","slug":"antara-ghosh","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/employee-spotlight\/2023\/03\/07\/antara-ghosh\/","title":{"rendered":"Antara Ghosh"},"content":{"rendered":"
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\"Antara
Antara Ghosh<\/figcaption><\/figure><\/div>\n\n\n

Do you speak waveform? Antara Ghosh does. Okay, so that\u2019s not a language per se, though a waveform view of an integrated circuit design is, in many ways, a conversation between a future semiconductor device and the engineer who\u2019s creating it today. So deciphering waveforms is an indispensable skill to have, especially given the increasing importance of chips to the outlook of the global economy in the years ahead. In this conversation, Ghosh, an associate director for R&D, talks about the roots of her passion for regression testing, whether computers designing computers will eventually put us all out of work, and why at least some discussion of gender stereotypes is okay.<\/h4>\n\n\n\n

So for mere mortals here for whom the whole chip design and verification process may be something of a mystery\u2026 What exactly is the Questa Verification Debugger tool? How is it used in chip design? And how do waveforms factor into all this?<\/strong><\/p>\n\n\n\n

Antara:<\/strong> We\u2019re talking about what happens far upstream in the design process \u2013 way before fabrication, before tape out. A variety of our tools come into play here\u2026simulators, emulators, formal verification software. Early on, design teams use a high-level language, maybe VHDL, to specify the functionality of a new chip or SoC at an abstract level. Next, they run these designs through various tools that take things down to lower levels of abstraction, say to the gate level or maybe register-transfer level, which can then be input into a simulator. Now let\u2019s say the simulator indicates there\u2019s a problem, though the designer is not sure why. That\u2019s where Visualizer comes in. It helps users further explore and fix these problems in simulation and verification. The waveform is a representation of how signals travel through an IC over time. Just because an output at a given point in time is wrong, it doesn\u2019t mean that\u2019s where the problem is. Users can work with a waveform view to trace a signal back. There can be any number of problems\u2026maybe multiple drivers are driving a single signal at the same time, creating a race condition, and there are all sorts<\/a> of debugging issues with low-power designs. I\u2019m in R&D and we\u2019re exploring many ways to make things easier for users.<\/p>\n\n\n\n

Such as\u2026?<\/strong><\/p>\n\n\n\n

Antara:<\/strong> The perpetual question is how to make my tool faster and improve scalability, especially as we move to designs of gigantic proportions. Debugging often happens in real-time. It doesn\u2019t matter if we can process billions of instructions flowing through a design\u2026if a user is in our GUI and has to wait more than two seconds, the tool is useless. I\u2019m also passionate about making regression testing and analysis more efficient. The way it works now and has for years is that chip design teams work on their designs during the day, then run their regression analysis overnight. If something fails, they start our debugging tool the next morning and look at what part of the checked-in code base caused the failure. I\u2019m trying to figure out how we can automate the process and integrate our tool into the regression systems run by our customers. There might be some AI\/ML involved, though an automated script might be enough for starters\u2026even to just open the tool, take the user to a specific point, and save some time.<\/p>\n\n\n\n

So you\u2019re going to have computers designing computers and eventually put us all out of a job?<\/strong><\/p>\n\n\n\n

Antara:<\/strong> Ha! Hardly\u2026 I just want to make the debug engineer\u2019s life easier. The engineers doing debugging often do that exclusively. It\u2019s a different group of people than those who check in their code the night before. It\u2019s massively time intensive. Currently, the industry spends 60% or even 80% of its design and verification time on debugging. Humans will be in the loop for a long while yet.<\/p>\n\n\n\n

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I have never seen a problem with just one solution, so the more input, the better. <\/p>\n– Antara Ghosh<\/cite><\/blockquote>\n\n\n\n

How did you get into all this? Where does a passion for something like regression testing come from?<\/strong><\/p>\n\n\n\n

Antara:<\/strong> My father started his career as a maths teacher. Given India\u2019s history last century, he was part of a generation that went through so much turmoil. He never could thoroughly explore his potential, though he had it in him, and he passed his passion on to me. I could spend hours doing maths, starting at a young age. I didn\u2019t use a computer until college. I chose computer science in part because of the theoretical aspect. I fell in love with algorithms, with solving NP-hard problems\u2026I guess you could say maths is my safe space.<\/p>\n\n\n\n

How might a highly technical field like EDA benefit as more women make their way into senior roles?<\/strong><\/p>\n\n\n\n

Antara:<\/strong> There are stereotypical masculine and feminine qualities, and historically, even now, in the press coverage of very wealthy male technologists, you see outsized aggression and flamboyance being rewarded. A general stereotype attached to women is that they are more nurturing and better at listening and creating a space for sharing ideas, which is an asset in an engineering context\u2026I have never seen a problem with just one solution, so the more input, the better. <\/p>\n\n\n

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\"Antara
Antara Ghosh: “None of us fit into any box…”<\/figcaption><\/figure><\/div>\n\n\n

Isn\u2019t it a risk to talk about stereotypes?<\/strong><\/p>\n\n\n\n

Antara:<\/strong> None of us fit into any box, but there are differences over large numbers of people and by gender, also in terms of what is incentivized by management and culture at large. I\u2019d say Siemens does an especially good job at celebrating diverse management styles. Perhaps I index high on classically masculine qualities\u2026I\u2019m logical and straightforward, and emotions make me uncomfortable. And yet, I owe a good deal of my career advancement to my line managers, all of whom have been men, and many of whom have been extraordinarily nurturing and empowering, and have always encouraged me to speak up. It\u2019s about making space for all of us.<\/p>\n\n\n\n

QUICK TAKES<\/strong><\/p>\n\n\n\n

Anything about you that might surprise colleagues?<\/strong><\/p>\n\n\n\n

I frequently daydream.<\/p>\n\n\n\n

Book, music and streaming recommendations?<\/strong><\/p>\n\n\n\n

Book: \u201cThe Nutmeg\u2019s Curse\u201d by Amitav Ghosh. Music: Queen and Billie Eilish. Streaming: the BBC\u2019s \u201cAgatha Christie\u2019s Poirot.\u201d<\/p>\n\n\n\n

One technology you couldn\u2019t live without and one you wish had never been invented?<\/strong><\/p>\n\n\n\n

The same answer for both: my smartphone.<\/p>\n\n\n\n

Best part of living where you do?<\/strong><\/p>\n\n\n\n

Family and culture. My roots are here in India. I can take care of my elderly family, my parents and my husband\u2019s too. It\u2019s reassuring to be surrounded by people with similar backgrounds\u2026it\u2019s very easy to make connections, maybe especially around family issues.<\/p>\n\n\n\n

Wellness advice?<\/strong><\/p>\n\n\n\n

Regimented diet, walk and go to the gym, and for escape and relaxation\u2026read a lot.<\/p>\n","protected":false},"excerpt":{"rendered":"

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