{"id":6539,"date":"2014-01-27T10:16:32","date_gmt":"2014-01-27T09:16:32","guid":{"rendered":"https:\/\/blogs.mentor.com\/colinwalls\/?p=6539"},"modified":"2026-03-26T16:42:30","modified_gmt":"2026-03-26T20:42:30","slug":"low-power-multicore-from-a-software-designers-perspective","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/embedded-software\/2014\/01\/27\/low-power-multicore-from-a-software-designers-perspective\/","title":{"rendered":"Low power multicore from a software designer\u2019s perspective"},"content":{"rendered":"

After talking about low power CPU modes<\/a> last week, I make no apology for returning to the topic. Reducing power on a single core embedded system is a challenge. With a multicore design, there are many other nuances. As with most system development, there are two highly interrelated facets to the process: design and verification [which software developers commonly call debugging].<\/p>\n

Different semiconductor vendors have different ideas on how to build such systems …<\/p>\n

Some months ago, I posted about ARM’s big.LITTLE approach<\/a>. Broadly, the idea is that the CPUs in a multicore systems are instantiated in pairs. Each CPU of the pair is a different architecture – though both ARM, obviously – one has high computational power and the other is designed to be more power efficient. Code is run on the appropriate CPU according to the power budget of the moment.<\/p>\n

Imagination Technology Group [who you might recall acquired MIPS a while back] have an alternative approach, which I read about in this article<\/a>. They regard big.LITTLE as unnecessarily complex, as it involves two CPU architectures. They propose a design where the CPUs are all identical in architecture, but some are instantiated to operate at a high voltage\/frequency and deliver performance and others are configured for low power. Again, the code runs on a CPU appropriate to the current power budget.<\/p>\n

I cannot say which of these is best from the chip designer’s viewpoint [as I am not a chip designer!], however, I think there would be little to choose between them from a purely [application] software perspective. System level software would, I guess, be slightly simpler using Imagination’s approach.<\/p>\n

\"\"<\/a>In either case, the software developer has a challenge – figure out what is happening across multiple cores, while keeping a careful eye on the power consumption. I think another commercial for Mentor Embedded’s Sourcery Analyzer<\/a> is in order. It is hard to imagine a better tool for the job.<\/p>\n","protected":false},"excerpt":{"rendered":"

After talking about low power CPU modes last week, I make no apology for returning to the topic. Reducing power…<\/p>\n","protected":false},"author":71677,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[391,300,562,308,563,502],"industry":[],"product":[],"coauthors":[],"class_list":["post-6539","post","type-post","status-publish","format-standard","hentry","category-news","tag-arm","tag-embedded-software","tag-imagination","tag-low-power","tag-mips","tag-sourcery-analyzer"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/posts\/6539","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/users\/71677"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/comments?post=6539"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/posts\/6539\/revisions"}],"predecessor-version":[{"id":10239,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/posts\/6539\/revisions\/10239"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/media?parent=6539"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/categories?post=6539"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/tags?post=6539"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/industry?post=6539"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/product?post=6539"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/embedded-software\/wp-json\/wp\/v2\/coauthors?post=6539"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}