If signal integrity engineers had the power to make their jobs as easy as possible, every signal in an electronic device would have its own coaxial cable to connect driver to transmitter.\u00a0 But then electronics would be the size of buildings again and certainly wouldn’t fit in your pocket.\u00a0 So instead, we try to cram as much stuff as possible onto a little PCB and make\u00a0it work at 100s and 1000s of MHz.\u00a0\u00a0 And, for the most part, we are successful, even when faced with cost reductions and crazy form factors that make our jobs even harder.<\/p>\n
A consequence of that is trying to control all the coupling that occurs between signals, and to the outside world.\u00a0 Something like a via transition makes that really hard to do.\u00a0 Ideally, every signal via transition would be surrounded by as many vias as possible, all conected together to mimic the shield of a coaxial cable.\u00a0 But that is pretty unrealistic, so we usually add a couple of transition vias around the signal via.\u00a0 Some people only add one, and some don’t add any!!\u00a0 How many do you need?\u00a0 Well, you can answer that by running SI-PI co-simulations using Hyperlynx SI\/PI.\u00a0 It allows you to experiment with different configurations of stitching vias, or stitching capacitors (necessary if the via is transitioning between layers that reference different\u00a0planes of different voltages).\u00a0 Once you’ve determined what configuration works for your stackup and your signals, you can\u00a0use the Vertical Reference\u00a0Plane Change DRC in HyperLynx DRC to verify that it was done correctly, and that your board will be free from all the coupling that occurs from signals transitioning through vias.<\/p>\n