{"id":11793,"date":"2026-04-27T08:00:00","date_gmt":"2026-04-27T12:00:00","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/?p=11793"},"modified":"2026-04-27T09:06:52","modified_gmt":"2026-04-27T13:06:52","slug":"whats-new-in-hyperlynx-2604","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/2026\/04\/27\/whats-new-in-hyperlynx-2604\/","title":{"rendered":"What’s new in HyperLynx 2604"},"content":{"rendered":"\n

Accelerating PCB design with smarter and enhanced workflows<\/h2>\n\n\n\n

HyperLynx 2604 release brings a comprehensive set of enhancements that make PCB design verification faster, more intelligent, and more accessible. We are thrilled to announce the new AI-Powered Capabilities <\/strong>powered by Product Support Copilot<\/strong> which integrates with Siemens Fuse EDA AI System<\/a>, providing documentation support directly within HyperLynx SI\/PI, Schematic Analysis, Advanced Solvers, DRC, and AMS. This contextual help reduces time spent searching documentation and accelerates the learning curve for new users. This release delivers meaningful improvements across all product lines: Schematic Analysis, AMS, DRC, SI\/PI, Advanced Solvers, and Design Space Exploration, with a clear focus on eliminating tedious manual work and accelerating design cycles.<\/p>\n\n\n\n

Here\u2019s a quick update on each of these areas:<\/p>\n\n\n\n

Schematic Analysis:<\/h2>\n\n\n\n

Model creation has traditionally been one of the most time-consuming aspects of signal integrity analysis. HyperLynx 2604 transforms this workflow with breakthrough automation features:<\/p>\n\n\n\n

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  • Creating active models from Xpedition Designer<\/strong> now extends beyond passive components and connectors to include any part in the design. The software automatically propagates pin numbers, names, types, and part numbers directly from schematic symbols, creating partially-filled models that eliminate the “starting from scratch” approach.<\/li>\n\n\n\n
  • Intelligent model editing<\/strong> eliminates reliance on Excel templates entirely. Engineers can now work directly within HyperLynx with features that exceeds Excel’s capabilities.<\/li>\n\n\n\n
  • Import FPGA model from FPGA I\/O Optimizer<\/strong>. Previously, users had to export Xchange files in CSV format; now, I\/O Optimizer’s native FCD files import directly, removing an entire step from the workflow.<\/li>\n\n\n\n
  • Bit swizzling support,<\/strong> is a long-requested feature that allows re-ordering of 8-bit groups (bytes) within wider data buses. This is commonly used to optimize PCB layout, reduce trace length mismatches, and achieve timing constraints.<\/li>\n<\/ul>\n\n\n\n
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