{"id":11680,"date":"2025-12-09T12:54:30","date_gmt":"2025-12-09T17:54:30","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/?p=11680"},"modified":"2026-03-27T09:48:20","modified_gmt":"2026-03-27T13:48:20","slug":"how-our-customers-are-transforming-power-electronics-design-with-hyperlynx-for-true-design-optimization","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/2025\/12\/09\/how-our-customers-are-transforming-power-electronics-design-with-hyperlynx-for-true-design-optimization\/","title":{"rendered":"How our customers are transforming power electronics design with HyperLynx for true design optimization"},"content":{"rendered":"\n

Power electronics systems have become the invisible backbone of modern digital infrastructure, driving everything from network switches to electric vehicles and industrial controls. Yet, the process of designing these vital circuits has traditionally relied on rounds of manual tuning and trial-and-error validation, a method that struggles to keep pace with escalating system complexity and performance demands.<\/p>\n\n\n\n

Factors such as a poorly chosen PCB stack-up, operating a switch-mode power supply outside its recommended range, suboptimal capacitor selection, or lurking thermal stress invite failure despite the best intentions and component choices. This shows how critical it is to optimize your design in the earliest development stages when things are still conceptual.<\/p>\n\n\n

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\"Fig.
Fig. 1: Traditional workflow based on trial & error<\/figcaption><\/figure><\/div>\n\n\n

Seamless verification and optimization-based workflow<\/h2>\n\n\n\n

Today, we offer automated, data-driven workflows that are reshaping power electronics development, and turning simulation and verification into continuous, integral parts of the engineering journey. With a digital twin of every component and a workflow that spans all requirements, power electronics engineers now work in a future-ready, scalable environment.<\/p>\n\n\n

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\"Fig.
Fig. 2: Seamless verification and optimization-based workflow <\/figcaption><\/figure><\/div>\n\n\n
\"Fig.<\/figure>
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This concept of integrated and proactive solution is illustrated through a practical Microchip<\/a> switch reference design (KSZ9477). Automated design exploration identified potential solutions, then routing and placement were introduced, and finally these changes are verified with a 3D EM solver. This resulted in placement optimization, reducing switching losses, and meeting design requirements.<\/p>\n<\/div><\/div>\n\n\n\n

Step 1: Design process<\/h2>\n\n\n\n

Starting from an integrated schematic with an enterprise shared component library that links all electrical, physical, and manufacturing data together at creation, HyperLynx Schematic Analysis<\/a> ensures consistency from the start and provides early intelligence and validation of design concept before hardware exists.<\/p>\n\n\n

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\"Fig.
Fig. 4: SMPS and MCU are tightly integrated<\/figcaption><\/figure><\/div>\n\n\n

Step 2: Functional simulation<\/h2>\n\n\n\n

With a validated schematic in hand, this paves the way for design constraints to be integrated in the layout before HW exists. To define feedback resistor values of the switch mode power supply (SMPS) and optimize output voltage HyperLynx Analog & Mixed Signals Simulator (AMS) simulates the system behavior both in time and frequency domains. This combined simulation allows a full view of loses and power dissipation, giving insight into system-level behaviors to precisely understand the SMPS characteristics, which we need to model the VRM in further analysis.<\/p>\n\n\n\n

With the new update of HyperLynx 2510, we can now explore \u201cwhat if scenarios\u201d with HyperLynx Design Space Explorer (DSE) launched directly from HyperLynx AMS<\/a> to add constraints for the feedback resistor values and current. Exploring different routing and placement and then verifying these solutions using HyperLynx Advanced Solver (AS ) which automates the extraction of parasitic effects, offering rule-driven layout optimization that replaces laborious manual checking and reduce the risk of missed edge cases. As a result, board parasitic such as resistance inductance and conductance are extracted and back-annotated to the schematic. This allows for verification of the board\u2018s influence on the switching behavior and accurately predict electrical losses.<\/p>\n\n\n\n

Step 3: Board level simulation<\/h2>\n\n\n\n

Then with HyperLynx Signal<\/a> and Power<\/a> Integrity (SI\/PI) we can run an AC analysis to check for PDN impedance over frequency. This would also include the board parasitics and we would see more accurate results. As PDN grow smarter and more connected, HyperLynx SI\/PI forms the centerpiece of this transformation. It performs DC drop analysis, AC decoupling analysis, and PDN optimization.<\/p>\n\n\n\n

Step 4: Thermal simulation<\/h2>\n\n\n\n

Another profound advance comes from HyperLynx\u2019s ability to integrate mechanical and thermal co-simulation. Using Siemens solutions such as FloEFD<\/a>, engineers can analyze how heat build-up interacts with electrical behavior, test placement strategies for heat-sensitive components, and ensure system reliability under all conditions.<\/p>\n\n\n\n

Step 4: Electro-thermal simulation<\/h2>\n\n\n\n

HyperLynx goes beyond traditional schematic or layout simulation and verification by marrying electrical and thermal analysis in a scalable, automated workflow. When evaluating a design\u2019s stackup, for example, HyperLynx exposes hidden resonances or path losses caused by too few layers or the wrong dielectric choices. It models the dynamic response of switch-mode regulators under realistic operating conditions, including fluctuating loads and control-loop behaviors, providing insights that drives .<\/p>\n\n\n\n

What was formerly a time-consuming, script-heavy process is now out-of-the-box and accessible: design space exploration, capacitor validity checks, power map generation, and AC and DC ab in analysis all happen organically inside HyperLynx, with continuous correlation against measured data. HyperLynx offers significant acceleration through the utilization of validated design templets, automation, and verification, demonstrating how modern PCB design flows enhance product robustness and reliability<\/p>\n\n\n\n

Proactive, data-driven optimization for Power Electronics Design<\/h2>\n\n\n\n

The result is clear: better electrical performance, stable thermal behavior, and most importantly; a seamless path to manufacturing that is validated continuously, from the very start. Using HyperLynx and its suite of supporting Siemens EDA tools, design teams can finally break away from reactive, trial-and-error engineering. Instead, they enter a process of proactive, data-driven optimization that delivers high-efficiency, high-reliability solutions from concept to production.<\/p>\n","protected":false},"excerpt":{"rendered":"

Using HyperLynx and its suite of supporting Siemens EDA tools, design teams can finally break away from reactive, trial-and-error engineering for power electronics systems. <\/p>\n","protected":false},"author":118841,"featured_media":11685,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[17],"tags":[1796,1765,1099,1779,137,139],"industry":[],"product":[1725],"coauthors":[2067],"class_list":["post-11680","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tips-tricks","tag-analog-mixed-signal","tag-power-electronics","tag-power-integrity","tag-schematic-analysis","tag-signal-integrity","tag-simulation","product-hyperlynx"],"featured_image_url":"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2025\/12\/HyperLynx_power_electronics-1280x720-1.jpg","_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts\/11680","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/users\/118841"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/comments?post=11680"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts\/11680\/revisions"}],"predecessor-version":[{"id":11686,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts\/11680\/revisions\/11686"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/media\/11685"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/media?parent=11680"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/categories?post=11680"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/tags?post=11680"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/industry?post=11680"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/product?post=11680"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/coauthors?post=11680"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}