{"id":10078,"date":"2021-02-01T02:34:53","date_gmt":"2021-02-01T07:34:53","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/pcbflow\/?p=174"},"modified":"2026-03-27T09:45:30","modified_gmt":"2026-03-27T13:45:30","slug":"old-habits-die-hard","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/2021\/02\/01\/old-habits-die-hard\/","title":{"rendered":"Old Habits Die Hard"},"content":{"rendered":"\n<p>In one of my previous <a href=\"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/2020\/07\/23\/should-you-really-trust-gerber\/\">blog posts<\/a>, I asked the question: Why do designers keep sending Gerber files to their manufacturers, knowing that the manufacturers will have to work hard to restore information that is \u201clost in transition\u201d due to the format limitations? The typical answer was \u2013 and still is \u2013 that they believe that manufacturers can manage with Gerbers.&nbsp; Why not? They\u2019ve been managing for decades!<\/p>\n\n\n\n<p>In this post, I will discuss another old habit of designers that won\u2019t die \u2013 putting non-copper features on copper layers, without considering the impact on manufacturing.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Non-copper features on copper layers<\/h2>\n\n\n\n<p>Sounds like a no-brainer, right? Why would anyone put non-copper features on copper layers? Well, apparently, many designers do so without realizing that <strong><em>any <\/em>feature they put on a copper layer is considered to be copper and will be manufactured as such.<\/strong><\/p>\n\n\n\n<p>The simplest and most common example is the text box with common information about the board, the revision, layer, customer, etc. Most likely, there\u2019s no intention to print this information on the real board. But if these features are not deleted explicitly during the pre-production stage at a fab \u2013 they will be printed. In most cases, these features are easily recognizable by a manufacturer and thus, no questions need be asked \u2013 they are simply deleted. In some cases (when the text box is clearly located outside the board outline, and\/or when the board is exported as ODB++, and these features bear a proper attribute) they may even be automatically recognized by CAM software \u2013 making it even simpler.<\/p>\n\n\n\n<p>The next example is much less trivial, and more dangerous: lines that run along the board outline. In the below illustration, you can find lines that denote copper traces, as well as inner and outer cutouts \u2013 in the same layer \u2013 you, of course, can easily distinguish between them. So you most likely rely on your fabrication partner\u2019s CAM engineer to recognize them and to delete them before the layer data is sent to production, right?<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"639\" src=\"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/\/wp-content\/uploads\/sites\/65\/2021\/01\/cutouts-1024x639.png\" alt=\"Copper layer PCB\" class=\"wp-image-176\" srcset=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2021\/01\/cutouts-1024x639.png 1024w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2021\/01\/cutouts-600x374.png 600w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2021\/01\/cutouts-768x479.png 768w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2021\/01\/cutouts-900x562.png 900w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2021\/01\/cutouts.png 1213w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Recently, I had conversations with three very experienced layout designers working for different companies in different countries and different industries \u2013 but the dialog was very similar:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Why are you placing outlines in copper layers?<\/li>\n\n\n\n<li>For reference purposes \u2013 in this way I can see if I\u2019m getting too close to a board outline during editing.<\/li>\n\n\n\n<li>But the outline already exists in a separate object\/layer (depending on the CAD tool being used), and it can serve as a reference as well, right?<\/li>\n\n\n\n<li>Right. But it is more convenient to have it in the copper layer.<\/li>\n\n\n\n<li>Understood.&nbsp; But why you don\u2019t remove these lines before you hand the board over to manufacturing?<\/li>\n\n\n\n<li>Why should I? Do they cause any trouble?<\/li>\n\n\n\n<li>Sure!&nbsp; They have to be removed explicitly before sending for production.<\/li>\n\n\n\n<li>Hmm, but why?<\/li>\n\n\n\n<li>Because they are on <em>copper<\/em> layers and will be treated as such unless explicitly instructed otherwise.<\/li>\n\n\n\n<li>Strange, I never heard about that.<\/li>\n\n\n\n<li>So after you hear this, will you consider removing them?<\/li>\n\n\n\n<li>I\u2019m not sure, up until now there\u2019s never been a problem\u2026<\/li>\n\n\n\n<li>It wasn\u2019t, because your manufacturing partners took care of it. And what if a manufacturer mistakenly removes too many lines?<\/li>\n<\/ul>\n\n\n\n<p>And so on\u2026 Old habits die hard\u2026<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">So what can be done?<\/h2>\n\n\n\n<p>If you\u2019re looking for a quick, easy way to improve efficiency and accuracy, consider simply removing non-copper features from copper layers before handing them over to production. And don\u2019t forget the solder mask, silk screen and other board layers, either. Deliver the outline features a separate layer \u2013 so that the manufacturer will be certain about the exact outline shape, and won\u2019t have to clean it from other layers.<\/p>\n\n\n\n<p>As professional designers, we aspire not only to meet product specifications, but carefully consider every trace, pad or hole, making sure that we cover every aspect of the design.&nbsp; It\u2019s craftsmanship at its best \u2013 incorporating a multilevel understanding of the product as a whole, while attending to its finest details.<\/p>\n\n\n\n<p>Now, with the introduction of PCBflow, we can add another layer to our craft \u2013 manufacturability.&nbsp; PCBflow introduces powerful manufacturability tools that help us overcome our old habits and boost our performance to a new level of professionalism.<\/p>\n\n\n\n<p>Sign up and try it out at <a href=\"https:\/\/www.pcbflow.com\/?utm_campaign=blog_oldhabits&amp;utm_source=blog&amp;utm_medium=organic\" target=\"_blank\" rel=\"noopener\">https:\/\/www.pcbflow.com\/<\/a> .&nbsp; &nbsp;<\/p>\n\n\n\n<p>PCBflow runs in a secured cloud environment, so you can rest assured that your IP is fully protected.<\/p>\n\n\n\n<div class=\"wp-block-buttons is-layout-flex wp-block-buttons-is-layout-flex\">\n<div class=\"wp-block-button\"><a class=\"wp-block-button__link wp-element-button\" href=\"https:\/\/www.pcbflow.com\/?utm_campaign=blog_oldhabits&amp;utm_source=blog&amp;utm_medium=organic\" target=\"_blank\" rel=\"noopener\">Click to find out more about PCBflow<\/a><\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>In one of my previous blog posts, I asked the question: Why do designers keep sending Gerber files to their&#8230;<\/p>\n","protected":false},"author":70060,"featured_media":177,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[12,13],"tags":[1750,1865,94,1870,113,1883,1885,1887,1892],"industry":[],"product":[693],"coauthors":[1894],"class_list":["post-10078","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-learning-resources","category-news","tag-dfm","tag-gerbers","tag-odb","tag-online-dfm","tag-pcb-design","tag-pcb-manufacturing","tag-pcb-tweaking","tag-pcbdesign","tag-silkscreens","product-pcbflow"],"featured_image_url":"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/65\/2021\/01\/old_habits.jpg","_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts\/10078","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/users\/70060"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/comments?post=10078"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts\/10078\/revisions"}],"predecessor-version":[{"id":10836,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/posts\/10078\/revisions\/10836"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/media\/177"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/media?parent=10078"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/categories?post=10078"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/tags?post=10078"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/industry?post=10078"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/product?post=10078"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/electronic-systems-design\/wp-json\/wp\/v2\/coauthors?post=10078"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}