ECTC’2017 Sets Orlando Abuzz with Fan Out Wafer Level Packaging (FO-WLP) – posted on behalf of Kevin Rinebold

This year’s ECTC is one of the best attended in recent history that I can recall.  The hot topic is FOWLP with standing room only sessions (see left). The great key note given by Babak Sabi from Intel was very insightful, discussing heterogeneous packaging to address bandwidth and interconnect needs of high-performance computing.

Many of the customer discussions in the Mentor booth echoed the theme of the keynote, with emphasis on the disruptive impact on high-density advanced packaging (HDAP), and the key challenges of heterogeneous  planning and implementation of multi-die packages, as well as verification (DRC, LVS, LVL) of 2.5D/3D package assemblies.  Customers were very interested in learning about our new IC package design solution, and Calibre 3DSTACK and how it provides the key to heterogeneous package design challenges.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/electronic-systems-design/2017/06/01/ectc2017-sets-orlando-alight-with-fan-out-wafer-level-packaging-fo-wlp-posted-on-behalf-of-kevin-rinebold/