{"id":2969,"date":"2024-10-30T18:14:41","date_gmt":"2024-10-30T22:14:41","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/calibre\/?p=2969"},"modified":"2026-03-26T16:23:42","modified_gmt":"2026-03-26T20:23:42","slug":"shift-left-in-ic-design-a-holistic-strategy-for-faster-smarter-verification","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/calibre\/2024\/10\/30\/shift-left-in-ic-design-a-holistic-strategy-for-faster-smarter-verification\/","title":{"rendered":"Shift left in IC design: A holistic strategy for faster, smarter verification"},"content":{"rendered":"\n

By Michael White and David Abercrombie<\/p>\n\n\n\n

As IC design complexity continues to grow, companies are turning to the shift left approach, a forward-thinking strategy that moves critical verification tasks earlier in the design process, enabling faster time-to-market and higher design quality. Initially coined by software engineer Larry Smith in 2001 for software testing, shift left emphasizes the early identification of issues, leveraging automated tools to improve productivity and reduce the risk of costly errors later in the design process. In the IC design realm, shift left is far more than just a trend\u2014it’s a transformative strategy that brings verification and optimization earlier in the design cycle, offering engineers a practical means to meet growing complexity head-on.<\/p>\n\n\n\n

What is shift left in IC design?<\/strong><\/h2>\n\n\n\n

In simple terms, shift left refers to moving key verification and validation processes earlier in the design flow. Traditionally, critical verification stages such as physical verification and design rule checking (DRC) occurred toward the end of the design process, where errors could delay production and increase costs. By shifting these checks left in the flow\u2014hence the name\u2014designers can catch and fix errors early, long before signoff verification.<\/p>\n\n\n\n

This approach is more than a minor adjustment. It reflects a paradigm shift in how design teams handle the ever-growing complexity of ICs, from system-on-chips (SoCs) to 3DIC assemblies<\/strong><\/a>. Companies like Siemens have led the way in developing advanced shift left tools, such as the Calibre\u00ae nmPlatform toolsuite<\/strong><\/a>, which integrates Calibre signoff-quality checks into early-stage design. This ensures that designs adhere to stringent foundry rules and perform optimally under real-world conditions, well before tapeout.<\/p>\n\n\n\n

We also dive into what exactly shift left is in a practical and easy to follow two minute video here Shift left with Calibre<\/a> <\/strong>\u2013 sit back and relax with a cup of coffee to watch! <\/p>\n\n\n

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The challenges shift left can battle<\/strong><\/h2>\n\n\n\n

The constant climb in the intricacy of IC designs has made traditional verification flows less efficient and more prone to error. When verification occurs late in the design cycle, problems discovered during signoff can require extensive redesigns, delaying time-to-market and inflating costs. For example, when errors in a nearly complete design are detected, designers often have to rework the entire layout, which may introduce new issues elsewhere.<\/p>\n\n\n\n

This reactive approach has proven unsustainable, especially as design rules become more restrictive and designs more intricate. Shift left addresses these challenges by focusing on:<\/p>\n\n\n\n