By Michael White, John Ferguson, and Shelly Stalnaker – Mentor, A Siemens Business
In the integrated circuit industry, changes comes at you fast and furious. Are you ready for the next evolution?
For years, decades even, the semiconductor industry has lived by the process node, which was originally named by its most crucial dimension, the length of the transistor’s gate, which controls the flow of current through the device. Thus, back in the 90’s, you had the 350, 250, and 180nm nodes. The industry broke new territory around 2007, when it introduced the first “deep sub-micron” node at 90nm. Just 13 years later, and 7nm designs are in production, 5nm and 3nm are in development, and 1nm is being researched.
Of course, we all know that those newer designations don’t really, actually, reflect the physical gate length any longer. Today’s terminology is simply a shortcut name that gives a title to a collection of design and manufacturing technologies that distinguish one node from the next. But one thing is clear—integrated circuit (IC) design and manufacturing has changed significantly. Innovations such as immersion lithography, multi-patterning, finFET transistors (and their new cousins, the gate-all-around finFET and carbon nanosheet transistors) have helped maintain the advance in IC technology and functionality. Advances in electronic design automation (EDA) software have supported the growth of huge and complex chip designs in reasonable, although continuously lengthening, time to market schedules. But what happens next?
Lots, as it turns out. In addition to technical innovations in IC design and manufacturing, changes in the semiconductor industry itself are emerging. Those huge and complex designs can now be brought to market faster by employing massive compute resources in the cloud. With the emergence of reliable and accurate verification software, 3D packaging is enabling design companies to more easily and confidently “mix and match” design styles and process nodes to take advantage of both cost-efficient established nodes and “function-forward” advanced nodes in a single computing package.
EDA companies work in collaboration with both design companies and foundries to ensure that what those design companies can dream up can become a physical reality. New approaches such as machine learning and artificial intelligence improve and expand verification and analysis capabilities. Constant engine optimization and “shift left” strategies ensure the most efficient operational environments in the face of increasing resource demands.
If you’re interested in exploring any of these topics, here’s a few of our recent white papers that might prove to be informative. Download one, or all, and settle in for a good read.
- New approaches to physical verification and cloud computing
- Comparing multi-patterning at 5nm: SADP, SAQP, and SALELE
- Improve lithographic hotspot detection with machine learning
- A machine learning approach to CMP modeling
- Calibre in the cloud: Unlocking massive scaling and cost efficiencies
- Using Calibre for Advanced IC Packaging Verification and Signoff