Fixing DRC errors in SADP designs at sign-off—Nobody said it was easy (but it can be easier…and much faster)

By David Abercrombie – Mentor, A Siemens Business

SADP + DRC = headaches? Not any longer.  GLOBALFOUNDRIES and Mentor collaborated on a solution for auto-fixing those DRC violations quickly and accurately.

Okay, you’ve reached sign-off on your SADP design. You did your level best to create a decomposed layout that met every SADP requirement. You run your sign-off DRC and…you’ve got errors! Now what? It’s going to take HOURS, if not DAYS, to debug and fix those errors. You’re either going to have to manually make changes in multiple decomposition layers (UGH), or make changes to the target metal shapes and re-run the automated design decomposition (with no guarantees that the changes will fix all the errors). Isn’t there a better way?

Well, yes. At least, now there is. GLOBALFOUNDRIES and Mentor recognized the frustration their mutual customers were experiencing, and put their (expert) heads together to figure out a better solution. The result? The Calibre Multi-Patterning functionality can now automatically decompose a layout (or modify an existing decomposition) using built-in DRC awareness and error visualization.

The key to auto-fixing DRC errors in an SADP layout is enabling the tool to make minor tweaks to the decomposition that only slightly change the metal shapes formed on the wafer, as compared to the originally-drawn target metal shapes. None of these changes affect the LVS connectivity of the design, or move any via connections to the metal, so there is no functional or resistance change in the circuit.

Oh, and did I mention that the tool also generates an updated target metal layer for back-annotation into the design database?

How, exactly, does all this work? You can get the full details in our white paper SADP design finishing – Saving time and improving results with DRC auto-fixing

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This article first appeared on the Siemens Digital Industries Software blog at