By Srinivas Velivala, Mentor Graphics
Custom designer? Learn how you can easily manage DRC waivers interactively during the design cycle, and ensure waiver information is available to downstream users
Fixing design rule checking (DRC) errors is a necessary “tax” that designers must pay before they can successfully tape-out their designs. As device characteristics keep shrinking, and design rules become more and more complex, analyzing and fixing DRC error results consumes a big chunk of the layout designer’s valuable time. Tight tape-out deadlines further exacerbate this problem, putting a lot of pressure on the layout designers to complete DRC debug as quickly as possible.
Design rule waivers — error exemptions granted by the foundry to the IP provider — can add unnecessary time to DRC debugging if not identified and managed properly. Waived errors do not need to be reviewed, but if they are not clearly identified in the results, designers may waste valuable time debugging these errors each time DRC is run.
Custom layout designers have had access to real-time, interactive DRC for some time now to improve their turnaround time. Adding capabilities to these tools that help custom and analog designers identify design rule waivers can reduce design and verification time even further. In this article, I’ll explore how designers can use realtime verification tools to quickly and easily create and manage waivers at different stages of the custom design cycle, using Calibre® RealTime.
In a previous article, I explained how Calibre RealTime provides interactive Calibre DRC feedback in your custom layout environment (using the same sign-off Calibre DRC deck as is used for batch Calibre DRC jobs), allowing layout designers to efficiently debug Calibre RealTime DRC results using the Calibre RealTime-RVE interface. However, custom layout designers can use Calibre RealTime not just to view DRC results, but also to waive DRC results. Even better, the Calibre RealTime interactive waiver flow not only allows designers to interactively waive DRC errors, but also applies these waivers in subsequent DRC runs, reducing future results “clutter” and enabling designers to focus on debugging real DRC errors.
A designer can run a Calibre RealTime DRC job, review the DRC error results generated, and then waive specific DRC errors as needed. Designers can waive all the results belonging to a particular DRC check-name, or waive only specific DRC results that belong to a DRC check, based on the context in which the results appear (Figure 1). When waiving the DRC results, designers can also type in any information that might be useful to other designers who encounter the waivers later. The waivers are also associated with a user name, date, and time to allow all designers to track the history of the waivers.
Figure 1. Users can waive results for a DRC check and type in explanatory comments for future reference.
When designers generate a waiver in a particular cell context, Calibre RealTime stores the waiver information in the OpenAccess (OA) design database in a separate view (realtime_waivers), but does not modify the layout view that contains the original design information. If designers open a new cell that instantiates a cell containing one or more of these waivers, and launch a Calibre RealTime DRC run, Calibre RealTime automatically waives any results in that DRC run that match the DRC waivers already present in the waiver database (Figure 2).
Figure 2. Error result against check PO.EX.1 is waived (green outline), while error result against check PO.EX.3 requires debugging (pink outline).
The Calibre RealTime waiver flow performs a post-processing analysis after the DRC run is complete to waive the applicable DRC error results. A DRC error is only waived when the check name, result marker, and cell context associated with the DRC result matches the check name, result marker, and cell context associated with the DRC result when it was originally waived. This waiver flow helps designers improve their productivity by focusing their debugging efforts on unwaived DRC errors when working on standard cells, block designs, and other medium-sized intellectual property (IP) designs. It can be especially useful in the early stages of design, to quickly eliminate a large percentage of those DRC errors that do not need to be debugged in future DRC runs.
However, when preparing for signoff, designers will always want to be completely sure they have not missed any true DRC errors that may affect the design in production or performance. In addition, companies or groups passing on intellectual property (IP) for inclusion in other designs will want to provide waiver information to their customers. Processing waivers efficiently at the full-chip level requires a more extensive and automated process, as context-dependent design rules can generate some DRC errors that are modified in shape, or promoted out of the cell, when a piece of IP is placed into context. This makes it likely that certain waivers may be missed when using approaches based on post-processing.
To ensure signoff-quality IP, and to assist downstream IP users with IP implementation, Calibre RealTime enables designers to reuse these waivers in batch DRC runs and at full-chip level, by allowing designers to transfer waiver information to Calibre RVE™ (Figure 3). From Calibre RVE, designers can export these waivers in GDSII format and supply them as input to the Calibre Auto-Waivers flow to waive DRC results generated on macros and full-chip designs. Calibre Auto-Waivers provides extensive automated waiver processing that ensures signoff-quality results. More information about the Calibre Auto-Waivers flow can be found here.
Figure 3. Users can export Calibre RealTime waivers to Calibre RVE, from which they can export the waivers to GDSII to be used in the Calibre Auto-Waivers flow.
Dealing with design rule waivers in different stages of the custom design cycle requires different approaches. Early in the design cycle, designers can effectively use the Calibre RealTime interactive waiver flow to identify waived errors and reduce unnecessary debugging of error results in future DRC runs, improving productivity throughout design creation. In the later stages of the design cycle, designers can reuse the waiver information in sophisticated automated waiver flows, such as the Calibre Auto-Waivers flow, to ensure signoff-quality results. In addition, IP providers can pass the waiver information to downstream designers to ensure that those designers only spend time fixing genuine DRC error results associated with the use of that IP in full-chip designs.
Srinivas Velivala is a product manager of the Design to Silicon Division of Mentor Graphics, focusing on developing Calibre integration and interface technologies.
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This article was originally published on www.eetimes.com