{"id":141,"date":"2022-07-21T16:03:27","date_gmt":"2022-07-21T20:03:27","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/aprisa\/?p=141"},"modified":"2026-03-27T09:09:24","modified_gmt":"2026-03-27T13:09:24","slug":"learning-resources-for-aprisa-digital-implementation","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/aprisa\/2022\/07\/21\/learning-resources-for-aprisa-digital-implementation\/","title":{"rendered":"Learning resources for Aprisa digital implementation"},"content":{"rendered":"\n

Discover Aprisa\u2019s intuitive, easy-to-use technology, and get ready for your next tapeout!<\/em><\/h3>\n\n\n\n

Have you had the opportunity to explore Aprisa\u2019s out-of-the-box place-and-route capabilities, and are you ready to deploy it for your next IC design project? We invite you to access our new Explore Aprisa library<\/a>, where you can learn how to use Aprisa. A user account is needed<\/a> to access this library.<\/p>\n\n\n\n

Through our Explore Aprisa library, you can learn what our cutting-edge EDA products can do and sharpen your skills through narrated videos, self-service presentations, webinars, white papers, and virtual labs. These resources are available for you to follow at your own pace, wherever and whenever you need them.<\/p>\n\n\n

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Figure 1. Aprisa architecture.<\/figcaption><\/figure><\/div>\n\n\n

There are three learning paths included in your Explore Aprisa platform. The Getting Started with Aprisa<\/em> path covers Aprisa fundamentals, allowing you to familiarize yourself with the fundamentals of using the tool. You will learn how to invoke Aprisa, get help for commands and steps on the flow, view a design, select objects, understand the parameters, and work with collections.<\/p>\n\n\n\n

Other topics in the Getting Started with Aprisa<\/em> path include creating and saving projects, initializing a floorplan with a boundary and cell rows, placing I\/O pins, routing power nets, and import\/export of a floorplan. The final topic walks you through creating power stripes, power rails, and via pillars.<\/p>\n\n\n\n

Once you are comfortable with the fundamentals, we recommend moving on to the Aprisa Basic Training<\/em>, which is both a good refresher and a continuation of the Getting Started<\/em> learning path. This section has 11 educational videos on different aspects of Aprisa, starting with the Flow Overview and User Interface<\/em> chapter, which addresses the most common questions about basic operation. The Data Structure and Scripting<\/em> video, for example, will help you get a handle on how to interact with the Aprisa database, access objects, and query and change the object properties.<\/p>\n\n\n

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Figure 2. Physical implementation flow.<\/figcaption><\/figure><\/div>\n\n\n

The next chapters will walk you through the flow from importing a library and design, to creating a basic floorplan<\/a> with power routing, all the way through the main steps of place and route as shown in Figure 2.<\/p>\n\n\n\n

The Floorplanning and Power Routing<\/em> chapter helps engineers with all aspects of building a floorplan. It will guide you through features like IO pin\/pad placement, bump creation and placement, macro placement, data-path tile array creation, and PG networks.<\/p>\n\n\n\n

Moving to more critical features to achieve best<\/a> PPA, the Timing Analysis<\/em> chapter will guide you through the steps to set up operating conditions, scenarios and timing analysis. Along with the setup, this chapter covers how to write-out timing reports and how to debug errors, unexpected outcomes, and timing correlation issues.<\/p>\n\n\n\n

Optimization is critical for achieving design closure, and the Setting Up Optimization<\/em> video covers the various input and library cell settings, and how to check the sanity of the design, adaptive MCMM, power optimization, and routing rules.<\/p>\n\n\n\n

Effective placement is important to achieving the best QOR and preserving it through the CTS and routing stages. The Placement Optimization<\/em> chapter discusses various techniques and controls to achieve the best results. This video shows how to analyze placement results and debug issues related to placement. The Clock Tree Synthesis<\/em> section includes an overview of Aprisa’s approach to CTS, talks about how to control and build conventional trees in Aprisa, and a quick overview on balanced H-tree and multi-point CTS.<\/p>\n\n\n\n

The Post CTS optimization<\/em> chapter will shed light on the different options and parameters for CTS optimization and the Routing & Post Route Optimization<\/em> chapter shows how to run global and detail route, congestion analysis and how to debug routing related issues. The final chapter, Export Design and ECO,<\/em> shows how to export design for signoff runs and how to run ECOs in Aprisa.<\/p>\n\n\n\n

After that, check out the webinars on specific topics such as low power and high-speed computing to enhance your learning on different areas relevant to your types of designs. <\/p>\n\n\n\n

Our Explore platform offers a free, on-demand, self-paced educational resource for Siemens EDA\u2019s solutions. We continuously add to the content of the Explore platform and you will automatically get access to all the latest content<\/a> once you register for the Explore Aprisa<\/a> library.<\/p>\n\n\n\n

You can follow these easy steps to register for and access the library.<\/p>\n\n\n\n