Making those bits go analog

It has been a very good year of partnership with Analog Bits, one of our key partners, and I wanted to take a moment to recognize our collaboration activities and success stories.

So who are ANALOG BITS? Analog Bits, Inc. is a prominent supplier of low-power, customized clocking and interconnect IP for easy and reliable integration into modern CMOS digital chips. Their product focus is low power analog and mixed Signal IPs that includes precision clocking macros such as PLLs & DLLs, PVT sensors, programmable interconnect solutions such as multi-protocol SERDES/PMA and programmable IOs, and specialized memories including high-speed SRAMs and T-CAMs. They boast a broad portfolio of silicon proven IPs in leading foundries such as TSMC, Samsung, GlobalFoundries, UMC and Intel foundry services (IFS), all of whom have foundational relationships with Siemens EDA to qualify our verification software. With IPs in over 75 process technologies spanning from 250nm through 3nm, they are a well-oiled machine with look-ahead technology planning.

Furthermore, Analog Bits has a customer centric approach with programmable and flexible designs with options for off-the-shelf, semi-custom and full custom designs. Ease of IP integration and first time silicon right are goals that they have consistently met across processes at foundries and IDMs. Their IP portfolio supports numerous applications in automotive & aerospace technology, computing & networking solutions, AI and machine learning applications and consumer products. All this led to their next level of amplified success with their recent acquisition by SEMIFIVE, an SOC platform developer, in March 2022. https://semifive.com

Analog FastSPICE (AFS), Siemens EDA’s signature circuit simulator for analog and mixed signal applications, is employed by Analog Bits for design verification. AFS XT technology was introduced in October 2020 for performance boost on post layout simulations, and Analog Bits was an early access adopter quoting “AFS eXTreme technology provides 6x performance improvement while maintaining SPICE accuracy for nanometer analog verification”. Since then AFS XT continues to enhance performance each quarter. For more details on AFS, see here >> Analog FastSPICE (AFS) Platform

Over the past 12 months, Analog Bits and Siemens EDA have partnered in various industry conferences to showcase Analog Bit’s IC design technology and Siemens’ IC verification technology.

TSMC OIP conference [October 2021]

Co-authored paper by Sweta Gupta  and Greg Curtis: Design and Verification of Clocking Macros and Sensors in N5 and N3 Processes Targeting High Performance Compute, Automotive, and IoT Applications

Siemens User2User conference [May 2022]

Keynote by Mahesh Tirupattur: Sensing the Unknowns and Managing Power

Paper by Sweta Gupta: Clocking Macros, Sensors and IOs in advanced process nodes >> Link

Design Automation Conference (59th DAC) [July 2022]

Co-authored paper and poster by Rounak Lokare and Pradeep Thiagarajan: Frequency synthesizers with a purpose in advanced process technologies >> Link

We at Siemens AMS IC Verification Business Unit appreciate the excellent support from Analog Bits executive team and design teams, and we look forward to our continued partnership. Special acknowledgements to Mahesh Tirupattur (EVP of Business Operations), Sweta Gupta (Director of Engineering) and Rounak Lokare (Senior design engineer)! https://www.analogbits.com

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/amsv/2022/09/06/making-those-bits-go-analog/