I have some exciting news to share for the IC design community regarding the Silicon Integration Initiative (Si2) Compact Model Coalition (CMC)’s Open Model Interface (OMI).
Analog and mixed-signal designs are pervasive throughout the technology landscape today. The rapid growth in data expansion is driving an exponential increase in new designs and new requirements for high performance computing, communications, automotive, and Internet of Things (IoT) applications. One of these requirements is an increased emphasis on longer term reliability.
Long term reliability has always been a focus for the automotive industry, but now includes other areas of technology design. As a result, accurate simulation of device aging over time has become an integral step in the verification process.
In the past, aging effects were often addressed through overdesign, leaving valuable margins on the table. However, in today’s extremely competitive market, designers have to optimize each and every design parameter to gain margins. These slim, cost-saving margins cannot be achieved without also considering, the long-term impact of aging.
Two important mechanisms that contribute to device degradation are Hot Carrier Injection (HCI) and the Positive/Negative Bias Temperature Instability (PBTI/NBTI). Despite several initial efforts to develop a standardized aging model that covered these effects, the semiconductor industry ecosystem could not converge, therefore all foundries and Integrated Device Manufacturers (IDMs) had to rely on their own home-grown aging models that represent their process technology behavior.
However, in 2018 the Silicon Integration Initiative (Si2) Compact Model Coalition (CMC) released the first version of the Open Model Interface (OMI). The OMI standard interface enables foundries, IDMs and EDA vendors to focus their resources on supporting a single, common standard interface.
Siemens EDA, a leader and active CMC member, realized the key advantages of the OMI standard. As a result, the OMI standard has been supported by Siemen’s EDA’s Analog FastSPICE (AFS) simulator since December 2018 and we have been collaborating closely with key partners to benefit from that work.